Synopsys Digital Design Family Presentation
Efficient Design Implementation for Multi-Die Systems
UNIFIED EXPLORATION-TO-SIGNOFF
3DIC COMPILER
Exploration
& Creation
Implementation
System Signoff
Complete architecture-to-signoff
solution in a consolidated
user environment
End-to-end solution for
DIE-TO-DIE IP
UCle Die-to-Die IP
PHY
Controller
Security
Common Fusion Data-model
efficient 2.5D and 3D multi-die
system integration
Verification IP
Scalable
100s of billions
of transistors
Productive
Fast exploration
& design
Golden Signoff
Convergence to
optimal PPA/mm3
Complete
PHY, Controller,
VIP...
synopsys
Delivers up to
4Tbps bandwidth in a
multi-module configuration
Enables ultra-low latency
link between two dies
Secure
Opt. Authentication
Engine
Robust
Based on
Proven IP
© 2023 Synopsys, Inc.
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