Navitas SPAC Presentation Deck slide image

Navitas SPAC Presentation Deck

Industry-Leading IP Position In GaN Power ICs st NITED STATES PATENT 120+ Traile O Navitas Semiconductor 2021 UNITED STATES PATENT Daniel M. Kinzer Santel Sharma, la Justin Zhang 9,647,476 Level Shift and Inverter Circuts for 0 Devices UNTED STATES PATENT Daniel M. Kinzer, Santosh Sharma Fason Zhang Reference and Patents Issued / Pending Suppy UNITED STATES PATENT es a fost Hall Bridge Power Conversion Circalis Using GaN Devices The second capter Fach of tub Soft Switched Single Stage Applications across mobile, consumer, EV, enterprise and renewables across UNITED STA Ju Jason - - - ■ Gate capacitors Mature and Comprehensive GaN Integrated Circuit Process Design Kit (PDK) Device Development / Library Circuit Development / Library 650 eMode power FET 12-40V eMode power FET 650V dMode power FET 12-40V dMode power FET 2-DEG & SiCr resistors ■ MIM / hybrid capacitors · Over 20 devices developed Characterization and Verification Dedicated and automated characterization stations (wafer level, package) Safe Operating Area (SOA) ■ Layout Design Rule Checker (DRC) -www ■ Layout Versus Schematic (LVS) ■ Layout Parasitic Extraction and simulation tool (LPE) Over 1 Mu characterized ■ Logic gates and latch Linear regulators · ■ ■ - Comparators Voltage sensors Charge pump Bootstrap circuits Level-shifters 7 Protection circuits I Navitas D D=D=D Over 200 circuits developed Models and Simulation ■ Device and circuit models with <5% accuracy Ultra-fast system simulations (Simplis) Accurate and fast device, circuit and system models cut design time from weeks to days and reduce design cycles by 50-75% INQU CHO Measurement vs Simulation Fully integrated Circuit Modelling 14
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