Intel Investor Meeting 2014 slide image

Intel Investor Meeting 2014

Logic Cell Height Gate Pitch Gate Pitch Logic Cell Width Metal Pitch (nm2) ||| TIL Metal Pitch 10000 1000 Logic Area Scaling Trend (Publicly available scaling information) 45 nm Planar 2007 2008 45 nm Planar 32 nm Planar 2009 Intel 2010 28 nm Planar 22 nm Tri-gate Others 20 nm Planar 14 nm Tri-gate 2011 2012 2013 Start of Volume Production 2014 "16/14 nm" Tri-gate Projected 2015 "10 nm" Tri-gate 2016 2017 Source: Intel data from shipping products Others based on published information: 45nm: K-L Cheng (TSMC), 2007 IEDM, p. 243 28nm: F. Arnaud (IBM alliance), 2009 IEDM, p. 651 20nm: H. Shang (IBM alliance), 2012 VLSI, p. 129 16nm: S. Wu (TSMC), 2013 IEDM, p. 224 10nm: K-I Seo (IBM alliance), 2014 VLSI, p. 14 2018
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