KLA Investor Day Presentation Deck

Hybrid Bonding Exposes Packaging to Front End-Like Challenges O Log Integration Schemes Logic Logic Logic (memory) Logic (memory) Sensor Image source: TSMC Logic Logic Inemory) Thermo-Compression (Bump) Hybrid (Bumpless) Hybrid bonding provides increased interconnect density Higher bandwidth Faster speed Key for Al logic chips and high bandwidth memory Power efficiency Bonding Void Sources ■ Surface defectivity ▪ Bonding film deposition Dicing profile defectivity Edge profile and defectivity ■ ■ Bonding Non-Uniformity Sources CMP profile and surface topography ▪ Wafer shape ■ ■ Cu pad misalignment Bonding temperature variations ■ Unprecedented inspection, metrology and process integration challenges in packaging industry KLAH Investor Day 73

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